In a manufacturing process of an electronic device such as a semiconductor device, a mask is formed on an etching target layer and an etching process is performed to transcribe a pattern of the mask onto the etching target layer. As the mask, a resist mask is generally used. The resist mask is formed by photolithography. Therefore, a critical dimension of the pattern formed on the etching target layer is influenced by a resolution limit of the resist mask formed by the photolithography.
However, in recent years, as electronic devices have been highly integrated, it has been demanded to form a pattern having a smaller dimension than the resolution limit of the resist mask. For this reason, as described in Patent Document 1, a multi-patterning method such as a double patterning method or a quadruple patterning method has been used.
In the double patterning method, a silicon oxide film is formed to cover a resist mask serving as a first mask, and in the entire region of the silicon oxide film, only a region along a side wall of the resist mask remains, and then, the resist mask is removed. Thereafter, an organic film is etched using the remaining region made of silicon oxide as a second mask. Thus, a third mask for etching an etching target layer is formed.
In the quadruple patterning method, a silicon oxide film is formed to cover the third mask obtained by the double patterning method, and in the entire region of the silicon oxide film, only a region along a side wall of the third mask remains, and then, the third mask is removed. Thus, a fourth mask for etching an etching target layer is formed.
In the above-described multi-patterning method, a chemical vapor deposition (CVD) method using a silane gas is generally used to form the silicon oxide film.
Patent Document 1: International Publication No. WO2009/101878
In the CVD method, a film thickness of a silicon oxide film formed on a top surface of a mask and on a surface of a layer directly under the mask is increased and a film thickness of a silicon oxide film formed along a side surface of the mask is decreased. Further, it is difficult to control a film thickness of the silicon oxide film formed along the side surface of the mask with a high accuracy. Therefore, in the conventional multi-patterning method, a controllability of a size of a mask, for example, a controllability of a width of the mask and/or a width of an opening of the mask is low. Accordingly, it has been demanded to increase the controllability of the size of the mask in the multi-patterning method.